IBM and Mentor Graphics Corporation today announced an agreement to jointly develop and distribute next-generation computational lithography (CL) software solutions to enhance the imaging capability of lithographic systems used in the manufacturing of integrated circuits at the 22 nanometer (nm) node and beyond. The agreement is part of IBM’s computation scaling initiative to create the industry’s first computationally based process for production of 22nm semiconductors, also announced today.
“The industry faces a critical challenge at 22nm, where traditional approaches to device scaling are no longer feasible due to the laws of physics,” said Gary Patton, vice president of IBM’s Microelectronics Division. “Instead, we have to look to computational scaling solutions to take us to the next couple of process nodes. We’re extremely excited about this unique partnership, which will allow us to deliver IBM’s preeminence in lithography process technology, algorithms, and high performance computing through the proven, market-leading Calibre nmPlatform. In the coming weeks IBM will have more to say about our plans and strategies regarding a comprehensive computational scaling (CS) ecosystem to support our strategy for computational scaling for 22nm, which we announced earlier today.”
“This partnership is the continuation of a successful relationship that has been in place since IBM and Mentor first started working together on model-based optical proximity correction (OPC) solutions for the 130nm node, and extends the collaboration we both described last February (http://www.mentor.com/company/news/calibrenmopccellbeibm) around the Cell Broadband Engine processor,” said Joseph Sawicki, vice president and general manager of the Design to Silicon Division at Mentor Graphics. “We’ve moved beyond the typical EDA customer-supplier relationship to a true joint R&D effort that will result in great benefits for our customers—not just the ability to successfully image critical features for the 22nm node, but also innovative solutions to manage turnaround time and cost of computing, which are extremely important to our customers’ overall success.”
Joint development work will take place at Mentor’s San Jose, IBM’s East Fishkill and IBM Research’s Yorktown locations. IBM and Mentor Graphics will develop unique methods and software, utilizing advanced mathematical techniques and software architectures, to achieve enhanced computational lithography capabilities enabling 22nm manufacturing.
Today, most integrated circuits are manufactured at 45nm or larger technology nodes. Producing circuits at 22nm is a challenging milestone in developing smaller, more powerful, more energy efficient microprocessors and system-on-chip (SoC) ICs that can be used in advanced computer servers, laptop, cell phones, and consumer electronics. However, current lithography methods—the process of designing photomasks to image circuit patterns on silicon wafers in mass quantity—are not adequate for critical layers at 22nm due to fundamental physical limitations.
Computational lithography is a method of overcoming limitations in the manufacturing process by using computationally intensive numerical methods to modify the shape of the masks and characteristics of the illuminating source at each layer of an IC in such a way that the result after exposure is closer to the intended shapes. One popular CL technique is optical proximity correction (OPC), which is a key element of IBM’s overall computational scaling initiative.
Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $850 million and employs approximately 4,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
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